資料來源 : Free On-Line Dictionary of Computing

front side bus
     
         (FSB) The {bus} via which a {processor}
        communicates with its {RAM} and {chipset}; one half of the
        {Dual Independent Bus}, the other half being the {backside
        bus}.  The {L2 cache} is usually on the FSB, unless it is on
        the same chip as the processor [example?].
     
        In {PCI} systems, the PCI bus runs at half the FSB speed.
     
        {Intel}'s {Pentium 60} processor used a bus speed and
        processor speed of 60 {MHz}.  All later processors have used
        multipliers to increase the internal {clock} speed while
        maintaining the same external clock speed, e.g. the {Pentium
        90} used a 1.5x multiplier.  Modern {Socket 370}
        {motherboards} support multipliers from 4.5x to 8.0x, and FSB
        speeds from 50 MHz to a proposed 83 MHz standard.  These
        higher speeds may cause problems with some PCI hardware.
     
        Altering the FSB speed and the multiplier ratio are the two
        main ways of {overclocking} processors.
     
        {Toms Hardware - The Bus Speed Guide
        (http://www.tomshardware.com/busspeed.html)}.
     
        {Toms Hardware - The Overclocking Guide
        (http://www.tomshardware.com/overclock.html)}.
     
        (2002-02-21)