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fairchild f8

資料來源 : Free On-Line Dictionary of Computing

Fairchild F8
     
         An 8-bit {microprocessor}.  The processor itself
        had no {address bus} - program and data memory access were
        contained in separate units, which reduced the number of pins
        and the associated cost.  It also featured 64 {register}s,
        accessed by the ISAR register in cells ({register window}s) of
        eight, which meant external {RAM} wasn't always needed for
        small applications.  In addition, the 2-chip processor didn't
        need support chips, unlike others which needed seven or more.
     
        The F8 inspired other similar {CPU}s, such as the {Intel
        8048}.  The use of the ISAR register allowed a subroutine to
        be entered without saving a bunch of registers, speeding
        execution - the ISAR would just be changed.  Special purpose
        registers were stored in the second cell (regs 9-15), and the
        first eight registers were accessed directly.  The windowing
        concept was useful, but only the register pointed to by the
        ISAR could be accessed - to access other registers the ISAR
        was incremented or decremented through the window.
     
        (1994-11-16)
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