資料來源 : Free On-Line Dictionary of Computing

Cyrix 6x86
     
         (6x86) {IBM} and {Cyrix}'s {sixth-generation},
        64-bit {80x86}-compatible {microprocessor}.  The 6x86 combines
        aspects of both {RISC} and {CISC}.  It has a {superscalar},
        {superpipelined} {core}, and performs {register renaming},
        {speculative execution}, {out-of-order completion}, and {data
        dependency removal}.  It has a 16-kilobyte {primary cache} and
        is socket-compatible with the {Pentium} P54C.  It has four
        performance levels: PR 120+, PR 150+, PR 166+ and PR 200+.
     
        The chip was designed by Cyrix and is manufactured by IBM.
     
        The architecture of the 6x86 is more advanced than that of the
        Pentium, incorporating some of the features of Intel's
        {Pentium Pro}.  At a given {clock rate} it executes most code
        more quickly than a Pentium would.  However, its {FPU} is
        considerably less efficient than Intel's.
     
        {IBM FAQ
        (http://www.chips.ibm.com/products/x86/6x86/faqs/6x86_faqs.html)},
        {Cyrix FAQ
        (http://www.cyrix.com/process/prodinfo/6x86/faq-6x86.htm)}.
     
        (1997-05-26)